Abstract: Forward-error-correction codes (FECs) are essential elements in the field of optical communication to deliver an ultra-reliable transmission. In the last decade, communication engineers are unprecedentedly eager to power-efficient FECs due to the scaling down of Moore’s law and the increasing demand of data rate. Typically, the area and power consumption of nowadays high speed FECs are dominated by memories. Embedded DRAM (eDRAM) is a promising approach to deal with this issue due to the fewer transistors. Algorithm and circuit can be co-designed, and refresh module can be removed in such a domain-specific eDRAM. By using non-refresh eDRAM instead of conventional SRAM, significant power reduction and area saving can be achieved in high-speed FECs.
This talk will address the eDRAM-based implementation issues on some mainstream optical FECs, focuses on staircase code and zipper code. The former is a widely adopted standardized FEC and the latter is an upgraded version of staircase code, which was proposed recently.