W01.T3 Technical Session 3 - Reliability and Safety
Moderator
Michelangelo Grosso, STMicroelectronics, Italy
Presentations
W01.T3.1 Improving Instruction Cache Memory Reliability under Real-Time constraints
Speaker
Fabien Bouquillon , Université de Lille, France
W01.T3.2 Common data language connecting HTOL testing to in-field use
Speaker
Marc Hutner , proteanTecs, Canada
W01.T3.3 Efficient use of on-line LogicBIST to achieve ASIL B in a GPU IP
Speaker
Lee Harrison, Siemens EDA, United Kingdom
W01.T3.4 Verification and Validation of Safety Element out of Context
Speaker
Shivakumar Chonnad , Synopsys Inc, United States