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W01.T3 Technical Session 3 - Reliability and Safety

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Moderator
Michelangelo Grosso, STMicroelectronics, Italy
Presentations

W01.T3.1 Improving Instruction Cache Memory Reliability under Real-Time constraints

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Speaker
Fabien Bouquillon , Université de Lille, France

W01.T3.2 Common data language connecting HTOL testing to in-field use

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Speaker
Marc Hutner , proteanTecs, Canada

W01.T3.3 Efficient use of on-line LogicBIST to achieve ASIL B in a GPU IP

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Speaker
Lee Harrison, Siemens EDA, United Kingdom

W01.T3.4 Verification and Validation of Safety Element out of Context

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Speaker
Shivakumar Chonnad , Synopsys Inc, United States